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Research & Development - EMBED

Exercises

Research & Development - EMBED

Welcome
Welcome
- General info
- Slides
Prerequisites
Prerequisites
C1
C1
- Introduction
- Theory
  Theory
  - Part 1
    Part 1
    
    Verilog Recap
    
    Latch vs Register
  - Part 2
    Part 2
    
    Debugging
    
    ILA
  - Part 3
    Part 3
    
    Pynq-Z2 SoC
    
    Zynq
  - Part 4
    Part 4
    
    Boot Procedure
    
    Git
- Hands-On
  Hands-On
  - HO-1 HDMI
  - HO-2 Vitis
- Homework
  Homework
  - Reading
  - Exercises
- Slides
C2
C2
- Introduction
- Theory
  Theory
  - Part 1
    Part 1
    
    AXI
    
    Communication Protocols
    Communication Protocols
    
    UART
    
    I2C
    
    SPI
    
    I2S
  - Part 2
    Part 2
    
    Interrupt / Polling
  - Part 3
    Part 3
    
    PYNQ
  - Part 4
    Part 4
    
    Memories
    
    HDMI
- Hands-On
  Hands-On
  - HO-3 AXI & Interrupts
  - HO-4 AXI BRAM
- Examples
  Examples
  - PYNQ
- Homework
  Homework
  - Reading
  - Exercises
C3
C3
- Theory
  Theory
- Hands-On
  Hands-On
  - HO-5 Rotary Encoder
- Homework
  Homework
  - Reading
Final Project
References
Planning

Tutorial Stacey

Complete the tutorial from Stacey about AXI Stream Basics.