AXI

The interesting part about Zynq is having PS and PL work together. The key components to enable this are AXI interconnects and interfaces. EMIO is another type of connection between PS and PL.

AXI Standard

Adcanced eXtensible Interface (AXI), current version is AXI4, is part of the ARM AMBA 3.0 open standard. Many devices and IP blocks arebased on this standard.

The AMBA standard was originally developed in 1996 by ARM for use in microcontrollers. It is now the de facto standard for on-chip communication.

There are three flavours of AXI4, each of which represents a different bus protocol:

• AXI4 : For memory-mapped links, and providing the highest performance: an address is supplied followed by a data burst transfer of up to 256 words.
• AXI4-Lite : A simplified link supporting only one data transfer per connection (no bursts). A single address and single data word are transferred.
• AXI4-Stream : For high-speed streaming data, supporting burst transfers of unrestricted size. There is no address mechanism. This bus type is best suited to direct data flow between source and destination (non memory mapped).

AXI Interconnects And Interfaces

An AXI Interconnect is effectively a switch which manages and directs traffic between attached AXI interfaces. There are several Interconnects in the PS, some interface with the PL, some are for internal use only. The connections between these interconnects are formed by AXI Interfaces. In the PL you can add AXI IP Blocks or create your own to interface with other components.

And AXI Interface is a point-to-point connection for passing data, addresses and handshaking signals between master and slave clients within the system.