I2S
I2S was created in the 1980s, when digital was beginning its conquest of the consumer-audio market. The stated purpose of I2S is to facilitate the development of audio electronics by means of a standardized interface for transmission of digital data among ADCs, DACs, digital filters, digital signal processors, and other types of ICs used in audio systems. It is inherently a two-channel protocol, because it was designed for stereophonic sound (that’s the fancy name for what we call “stereo”).
Characteristics of I2S
Data is driven on the SD line, the state of the WS line corresponds to the audio channel (right or left) that is currently being transmitted, and the clock line carries the serial clock. As you can see in the diagram, the WS and SCK signals can be generated by the transmitter, the receiver, or a third-party controller component.
The following lists identify salient characteristics of the three I2S signals.
Serial Data (SD)
- Digital values are transmitted MSb first.
- Transmitter and receiver do not need to have an agreed-upon word length; the transmitter sends what it has, and the receiver takes what it can use.
- New data bits can be clocked out on the rising or falling edge of the clock. However, they must be clocked in on the rising edge, so the more straightforward approach here is the arrangement shown in the diagram below—i.e., we clock data out on the falling edge and we clock it in on the rising edge.
- The protocol does not include unused clock periods between words; the LSb of one word is followed immediately by the MSb of the next word.
Word Select (WS)
- A logic low on WS indicates that the word currently being transferred is part of the data stream for the left audio channel; logic high on WS indicates right-channel audio.
- To facilitate data handling on both the transmitter and the receiver side, the WS signal transitions one clock period before the completion of a data word:
Clock
- The protocol does not specify a maximum data rate.
- The clock runs continuously.